h a l f b a k e r yWhat's a nice idea like yours doing in a place like this?
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Mixing micromachines with microelectronics is getting a fair amount of attention these days. There is IBM's millipede project, for example (see link). And there is at least one company using carbon nanotubes to make memory cells.
Well, here is yet another notion. Start with any "electrical circuit
schematic" that has a mechanical switch in it. It is symbolized as a little line attached to a hinge-point, with a contact-point near the other end (sometimes two contact points). You visualize the short line swinging on that hinge to make or break contact.
OK, they can and do carve such things out of silicon these days. Texas Instruments, for example, carves millions of little hinged mirrors for its "DLP" (digital light processor) chips. Carving a simple on-off switch should be almost trivial. Carving billions of them for modern Random Access Memory may be a little more difficult, but not impossible.
So, in use each memory cell consists of an input wire, a carved switch-wire, an output wire, and a capacitor. When the switch is carved, it is "doped" such that it can be electrostatically attracted or repelled (by a fleeting charge on the capacitor), thus moving it to make or break the circuit between input and output wires (and the state of the connection is interpreted as the standard binary Zero or One).
In a way, this notion is similar and opposite to an ordinary DRAM memory cell, which consists of one transistor (the switch) and one capacitor. But in a DRAM cell the capacitor holds the data as a quantity of electric charge, and because it quickly leaks away, it must constantly be "refreshed" -- the "D" in DRAM stands for "Dynamic".
Here, the position of the switch indicates the data, and we don't care if the capacitor loses its charge, because after being moved into position, the switch-wire stays there until the capacitor is momentarily charged up to move it again. That makes this a "static" kind of memory cell, which does not need to be periodically refreshed. Also, this memory cell can remember its data when the power is off, which is only to be expected if we don't care about the capacitor losing its charge (although being physically wacked might be expected to cause a lot of switches to move to new positions).
Experiments with nanotubes indicate that micro-mechanical switches ARE capable of keeping up with the extreme speeds of modern electronics. Meanwhile, a typical static RAM cell (the fastest type of standard memory available) is usually made from a group of six transistors, is therefore expensive compared to DRAM, and it must constantly be powered lest it forget.
IBM's millipede
http://ecoustics-cn...1015_3-5615611.html Intended as a hard-disk-drive replacement. [Vernon, Jun 21 2005]
Nanotube memory
http://www.nantero.com/mission.html This page has a link to a little movie showing how it works. [Vernon, Jun 21 2005]
DRAM background info
http://www.semiconfareast.com/drams.htm There's also a link to some SRAM info. [Vernon, Jun 21 2005]
DLP
http://www.dlp.com/Default.asp?bhcp=1 About those micromirror devices. [Vernon, Jun 21 2005]
A bunch of different memory technologies
http://www.hal-pc.o...4_may/babystep.html Found while seeking something else, of course. [Vernon, Jun 22 2005]
Being Baked?
http://www.trnmag.c..._demoed_111704.html Experiments involving some similarities and some differences. [Vernon, Jun 22 2005]
Faswitch technology
http://www.faswitch.../tech/faswitch.html Details of a mechanical backplane switching matrix. [Vernon, Jul 12 2005]
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Not so fast Vernon, old bean. Actually this is being baked quite happily for switching backplanes of large scale displays. See link. |
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[phlogiston], the link you provided was bad. But it contained enough info that I could replace it with a good one. Thanks! |
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Still, that idea is different from this one in various key respects. I don't think those Faswitches can be made as small as the ones I described in the main text. Also, the motion of the Faswitch, relative to a plane is toward-and-away, while I tried to describe a side-to-side motion, not unlike a windshield wiper. |
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cone company? is this a clever referral to Intel's latest ice cream CPU? |
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What in the name of............ ? This is very technical |
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But wouldn't a good sharp knock make the device lose its marbles? [+] |
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[coprocephalous], you mean the kind of thing that could also destroy the hard drive? YES (I said so in the main text). So? |
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But a HDD is generally only at risk of data damage whilst operating, due to surface damage by the heads. (Except, maybe, for extreme shocks in the presence of magnetic fields)
This would be at risk at all times - even when switched off. |
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I think there's scope for micro-machined Strowger selector switches here too. |
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so.... not really your idea then. I guess I'm not that impressed. |
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[coprocephalous], since this is the Halfbakery, I wasn't too concerned about the memory getting whacked. Even in the real world, plenty of memory never gets whacked after the server computer or desktop computer is turned on. And people with laptops tend to be more careful when the machines are "on" than "off". It is not NECESSARY for this memory to remember stuff when the power is off; it would simply be convenient. So, if this was made in the somewhat special 9-bits-per-byte form-factor, the 9th/parity bit could be checked by the hardware during power-up, and if a lot of errors showed up, the system could do a completely cold start, instead of the kind of warm start that assumes the memory is remembering stuff about the computer's last usage session. |
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[WcW], many Ideas are modest variants of other Ideas. So? This particular idea can have variants regarding the difficulty of moving each memory switch. The more difficult, the more abuse the memory could tolerate --and the more power, of course, the memory would consume when in use. Or perhaps some sort of additional mechanical gadget could be added, to ensure the switches stay locked in place when the power is off.... |
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