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Motherboard buses are long and hard to manipulate in a cramped space. It's easy to shove things in badly or not at all and they take up a lot of space. Given a fir tree shape, each branch could provide two lines, there would be no way anything could be inserted in the wrong place and the interface
would be shorter. That's it.
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there really should be a law protecting us from the use of the word christmas before december. sorry 19 -1 |
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OK, i'll alter it. Edit: Done. |
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Brings a whole new meaning to Branch Circuits... |
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I'm not sure I get it. Are you talking about a motherboard with expansion slots on both sides? |
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Rubs eyes, sees po, then looks up...yay oh
yay...sliverstormer!!! |
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The idea...yes, and with colored lights and an angel at the
top at mistletoe time. (Hahahahaaaa). |
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OK, probably shouldn't've posted this before sodding off for a week. Therefore, i'm fully expecting this anno to be justifiably ignored. I have in mind a socket sitting upon the motherboard which looks a little like a network or 'phone jack, into which a card with a male version of the same can be inserted, with an option of sticking the thing on the edge of the board for external access. Given a fir tree shape, there could be at least four lines per branch, eight lines per level and therefore a more compact arrangement which would be easier to insert. |
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So it's flat? A picture would be helpful. Keep in mind that for some high speed circuitry, trace length is important. |
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I like backplane designs: mine actually has a trunk to which 4 cards are connected, each of which may have some smaller cards attached so obvious [+] for "great minds..." (give or take card orientation). |
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I'll link to a picture once i can turf the offspring off the desktop. Yes, i'm conscious of the timing problem, but would this apply to all peripherals? |
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only peripheral I can think of offhand that might be affected by buss length of that magnitude would be the graphics card on high-powered gaming or rendering machines. |
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Wow, your kid has been on the computer for a long time. |
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It sounds like this would be far more expensive than the current edge
connectors, but I await a picture of some sort. |
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Timing constraints necessitating carefully controlled trace lengths apply
to any peripheral using a bus that has such requirements (e.g. PCIe),
regardless of whether that device personally needs to transfer data at such a high
rate. |
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